Dedication. List of Figures. List of Tables. Preface. 1. Introduction. 2. Preliminaries. 2.1 Boolean Reasoning. 2.2 Circuits. 2.3 Formal Verification. 2.4 Automatic Test Pattern Generation. 3. Algorithms and Data Structures. 3.1 Combining SAT and BDD Provers. 3.2 Summary and Future Work. 4. Synthesis. 4.1 Synthesis of SystemC. 4.2 Synthesis for Testability. 4.3 Summary and Future Work. 5. Property Generation. 5.1 Detecting Gaps in Testbenches. 5.2 Design Understanding. 5.3 Summary and Future Work. 6. Diagnosis. 6.1 Comparing SAT-based and Simulation-based Approaches. 6.2 Generating Counterexamples for Diagnosis. 6.3 Debugging Properties. 6.4 Summary and Future Work. 7. Summary and Conclusions. References. Index of Symbols. Index.
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